The complete full-stack architecture

Build software. Run it on your own CPU.

Turbo is a compiled programming language, a custom 32-bit RISC architecture, and a SystemVerilog hardware processor. Experience every layer of the computing stack.

turbo build prog.turbo
compiling
prog.turbo
12345678
fn add(a: i32, b: i32) → i32 {
return a + b;
}
 
fn main() {
let x = add(3, 7);
print(x);
}
Build Output
Lexed 18 tokens
Parsed AST (5 nodes)
Type checked — 0 errors
Code gen — 12 instructions
Assembled — prog.bin 48B
Executing on CPU sim…
$x =10✓ OK
The Language & Toolchain

Software Stack

Turbo is a statically-typed programming language with a C-like syntax supporting functions, loops, conditionals, and recursion. It compiles directly to a custom 32-bit RISC instruction set architecture (ISA).

The ecosystem, written in Rust, includes a two-pass compiler, an assembler that emits a compact binary format, an ISA simulator, and a full CLI.

The Hardware

SystemVerilog CPU

The Turbo Processor is a hardware implementation of the Turbo ISA. Binaries output by the software toolchain run natively on this CPU identical to the simulator.

It ships with two variants: a fundamental single-cycle datapath, and a high-performance 5-stage pipelined design with full data forwarding (EX→EX, MEM→EX), load-use stalls, and predict-not-taken branch flushing.

Core Components

Everything you need

Turbo Language

A C-like language with int, bool, and void types. Supports functions, loops, conditionals, and recursion.

Rust Compiler

Two-pass compiler combining AST parsing, strict type checking, and register allocation into assembly.

Assembler

Converts Turbo assembly into machine code. Resolves labels and outputs a structured Turbo binary format.

Software Simulator

Cycle-accurate tool for testing. Step through instructions, inspect all 16 registers, and trace memory execution.

WASM Playground

The compiler and simulator compiled to WebAssembly. Write, compile, and run Turbo programs directly in your browser.

Hardware CPU

SystemVerilog RTL implementing the Turbo ISA with both single-cycle and 5-stage pipeline architectures.

Up and running in seconds

01

Install the CLI

cargo install turbo-lang
02

Write your first program

fn fibonacci(n: int) -> int {
    if n <= 1 { return n; }
    return fibonacci(n - 1) + fibonacci(n - 2);
}

fn main() -> int {
    return fibonacci(10);
}
03

Compile and execute

$ turbo run fib.turbo
→ 55